A comparative performance analysis of RISC (ARM/RISC-V) and CISC (x86) architectures in modern computing systems: Power efficiency and workload-specific benchmarking

Authors

  • Zeeshan Safdar PhD Advisor, Environment & Climate Change, EcoCare Consultancy Services, Pvt. Ltd, Lahore, Punjab, Pakistan Author
  • Saleem Zubair Masters Student, RUDN Institute OF Environmental Engineering, Specialization ‘’ Ecology and Nature Management, People’s Friendship University of Russia (RUDN University) Author
  • Ayesha Saddiqa Assistant Professor, Department Law School, National University of Sciences and Technology, Punjab, Pakistan Author

Keywords:

Computer Architecture, RISC, CISC, ARM, x86, RISC-V, Processor Design, SPEC CPU2017, Geekbench, Performance-per-watt, Quantitative Benchmarking, Embedded Systems, Cloud Computing

Abstract

This paper overcomes that gap by methodically consolidating and comparing published benchmark data that has been confirmed by hardware review sites, as well as by SPEC and the official hardware manufacturers' specifications, for various mobile-, desktop-, cloud-, embedded- and artificial-intelligence-related workload types. However, the break is very clear: ARM-based RISC processors, such as those used in Apple's M4 and Qualcomm's Snapdragon X-series, offer significantly better efficiency performance and performance per Watt for thermally restricted machines, where x86-based CISC processors from Intel and AMD remain competitive in sustained throughput, legacy software support and specialized high-performance computing tasks. When it comes to cloud infrastructure, AWS Graviton4 instances showing significantly better latency than X86 based instances in various workloads, however others showing either matched or improved performance per watt when compared to X86 based instances; indicating that while architecture may be superior in some workloads, it's not in others. While still a bit of a green land in the world of chips compared to ARM and x86, the open-source RISC-V ecosystem has seen an eight-fold performance boost over the last 5 years, and is being embraced by edge and embedded application makers. The paper argues that one should not be influenced by the preconceived notions about the superiority of RISC or CISC in selecting architecture since it must depend on application-specific requirements, power constraints and overall software-ecosystem cost.

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References

J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 6th ed. Cambridge, MA, USA: Morgan Kaufmann, 2017.

D. A. Patterson and J. L. Hennessy, Computer Organization and Design: RISC-V Edition. San Francisco, CA, USA: Morgan Kaufmann, 2017.

D. A. Patterson and A. Waterman, The RISC-V Reader: An Open Architecture Atlas. Berkeley, CA, USA: Strawberry Canyon LLC, 2017.

W. Stallings, Computer Organization and Architecture, 11th ed. New York, NY, USA: Pearson, 2022.

A. S. Tanenbaum and T. Austin, Structured Computer Organization, 6th ed. Upper Saddle River, NJ, USA: Pearson, 2013.

D. M. Harris and S. L. Harris, Digital Design and Computer Architecture: RISC-V Edition. Codeocean, USA: Morgan Kaufmann, 2021.

Arm Architecture Reference Manual, Arm Ltd., Cambridge, UK, 2024.

Intel 64 and IA-32 Architectures Software Developer's Manual, Intel Corporation, Santa Clara, CA, USA, 2024.

AMD64 Architecture Programmer's Manual, Advanced Micro Devices, Austin, TX, USA, 2024.

Apple Silicon Overview, Apple Inc., Cupertino, CA, USA, 2024.

Power Architecture Documentation, OpenPOWER Foundation, Austin, TX, USA, 2024.

Snapdragon Technical Documentation, Qualcomm Technologies, San Diego, CA, USA, 2024.

RISC-V Specifications, RISC-V International, Geneva, Switzerland, 2024.

K. Asanović and D. Patterson, "Instruction sets should be free: The case for RISC-V," EECS Dept., Univ. California, Berkeley, CA, USA, Tech. Rep. UCB/EECS-2014-146, Aug. 2014.

C. Celio, P. Dabbelt, D. Patterson, and K. Asanović, "The renewed case for the reduced instruction set computer: Avoiding ISA bloat with macro-op fusion for RISC-V," arXiv preprint arXiv:1607.02318, 2016.

T. Lu, "A survey on RISC-V security: Hardware and architecture," arXiv preprint arXiv:2104.14811, 2021.

M. Perotti et al., "A new Ara for vector computing: An open source highly efficient RISC-V vector processor design," arXiv preprint arXiv:2206.04378, 2022.

B. Sá et al., "CVA6 RISC-V virtualization: Architecture, microarchitecture, and design space exploration," arXiv preprint arXiv:2309.01142, 2023.

"Apple M4 vs Snapdragon X Elite: Benchmark Comparison," Beebom, Nov. 2024. [Online].

"We tested it: Here's how Apple's M4 compares to Intel Lunar Lake and Snapdragon X Elite," XDA Developers, Nov. 2024. [Online].

"Apple M4 (10 cores) vs Intel Core Ultra 9 288V vs AMD Ryzen AI 9 HX 370," Notebookcheck, 2024. [Online].

"Apple M4 (10 cores) vs Intel Core Ultra 5 245HX vs Intel Core Ultra 7 255HX," Notebookcheck, 2024. [Online].

"I benchmarked the Snapdragon X2 Elite Extreme — here's how it compares to Apple M4, Intel Core Ultra 9 and more," Tom's Guide, Sept. 2025. [Online].

M. Larabel, "AWS Graviton4 96-Core Performance vs. AMD EPYC & Intel Xeon CPU Benchmarks Review," Phoronix, 2024. [Online].

"ARM vs x86: How AWS Graviton Can Save up to 40% on Cloud Costs," Dedicatted, 2026. [Online].

"Choose AMD EPYC CPUs for Hybrid Cloud Efficiency," Advanced Micro Devices, technical infographic. [Online].

M. Larabel, "RISC-V CPU Performance Up 8x in Five Years: SiFive HiFive Unmatched to SpacemiT K3," Phoronix, Jun. 2026. [Online].

SPEC CPU 2017 Benchmarks, Standard Performance Evaluation Corporation. [Online]. Available: https://www.spec.org/cpu2017/.

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Published

2026-08-14

How to Cite

Safdar, Z., Zubair, S., & Saddiqa, A. (2026). A comparative performance analysis of RISC (ARM/RISC-V) and CISC (x86) architectures in modern computing systems: Power efficiency and workload-specific benchmarking. Journal of Climate and Community Development, 5(2), 137-148. https://joccd.com/index.php/joccd/article/view/133